Table 2. Performance comparison between the presented work and hardware implemented designs

Ref [6] [12] This work
Technology 0.13 μm CMOS 0.18 μm CMOS 0.18 μm CMOS
Supply 1.2 V 1.2 V 1.8 V
Power 46-73 μW+ FPGA 374 μW+ ARM Cortex-M0 19.14 μW
Area (IC only) 2.35×2.38 mm2* 7×7 mm2** 3.4×4.6 mm2***
Motion Artifact Elimination can handle 17×larger amplitude SAR improvement 8-10 dB SNR improvement 9.96 dB
Without considering FPGA chip area
Without considering microprocessor chip area
Estimated chip area including the Pads